During processing of integrated circuits on a semiconductor wafer, a charge may collect on exposed metal interconnect surfaces, creating a so-called “antenna current.” This phenomenon, known as the antenna effect, may occur at each metal layer processed during circuit fabrication. Thus, there can be metal antennas that connect to only MOSFET and/or capacitor thin gate oxide, only p-n junctions, or both. If too much charge accumulates on the metal interconnect, the accumulated charge may damage an aspect, e.g., the gate oxide or p-n junction, of the device fabricated on the wafer. Thus, these signal routing metal interconnect lines need a means to discharge during processing to avoid device damage. One method for discharging the accumulated charge is by connecting a diode between a potentially damage-causing metal line and the other node of the aspect of concern in the device. For example, during the first metal layer processing, a large first metal line of a signal node connected only to a MOSFET gate node will generate a large charge across the gate oxide unless a diode is connected between the gate node and the ground node in such a manner that there is a path through conducting features that exist during first metal processing and/or p-n junctions from the ground node of the diode to the MOSFET body node. A diode that is used to discharge a metal line during wafer fabrication may be referred to as an “antenna diode.”
Antenna current is generally small compared to both forward and reverse biased p-n junction leakage current during processing. Thus, p-n junctions can provide an effective path for current to flow in both forward and reverse bias directions during wafer fabrication. p-n junctions are fairly robust to this passing charge but there is a limit. If the MOSFET drain/body p-n junction area is insufficient to handle the antenna current, then an antenna diode may be placed near and in parallel with the MOSFET to increase the effective p-n junction area. Gate oxide will also pass charge but with a very large effective impedance. Thus, significant voltages can develop across the gate oxide that, if high enough, can damage the gate oxide.
Additionally, gate oxide can only tolerate a small amount of passing charge per unit area before long-term reliability is significantly compromised. To prevent gate oxide damage and maintain long term reliability, limits may be defined on the ratio of exposed metal interconnect line's surface area and/or perimeter to the gate oxide area so as not to exceed a gate oxide passing current or charge density limit. When the ratio limit is exceeded, an antenna diode may be placed near the gate of the transistor, e.g., between the gate node and the body node which is generally connected to the voltage supply line (VSS or VDD) node to discharge (i.e., bleed-off, shunt) the charge from the gate node to the body node through the antenna diode p-n junction rather than through the gate oxide.
An antenna diode may be placed and connected to a circuit's signal node such that it is reverse biased during normal circuit operation and thus does not interfere with normal circuit operation. During normal circuit operation, however, energetic particles such as alpha, nuclear weapon generated, naturally occurring above earth's atmosphere in space or generated from an incoming particle interacting with the surrounding material (these generated particles are known as secondary particles) can pass near and/or through the p-n junction of the antenna diode. The Linear Energy Transfer (LET) defines the amount of energy the particle transfers to the surrounding material which in turn defines the number of electron-hole pairs (i.e., charge) produced along the particle's path in the silicon. LET is a function of particle energy and mass. When the particle forms a line of charge in the silicon that is collected by the p-n junction, the antenna diode will produce a current that flows across the p-n junction from the cathode to the anode with a magnitude that is a function of the particle's LET (the higher the LET, the higher the current magnitude) that lasts until the charge produced by the particle is removed or recombines. The net result is the generation of a transient current pulse through the diode. The consequence of this transient current pulse may be a transient false voltage transition (i.e., a single event transient (SET)) on the signal node, if the transient current pulse overpowers the ability of a driver to hold a valid voltage on the signal node and the stored charge of the signal node capacitance.
The SET can generally only disrupt circuit operation if the transient false voltage transition propagates beyond the initially affected signal node. To do this, the transient false voltage transition must change the initial signal node voltage past the reaction voltage level of the downstream circuitry (e.g., the input voltage level where logic gates distinguish between an input high versus low state is known as the input state switching voltage (Vswitch), typically around VDD/2 or the input to an amplifier in which case the voltage change for reaction could be very small) and stay past this reaction voltage level for a period of time sufficient for the downstream circuitry to respond. If the SET produces a transient false voltage transition of sufficient magnitude and duration such that circuitry connected to this node responds, the SET can propagate through the circuit and potentially disrupt the intended operation, ultimately resulting in the disturbance of a circuit containing stored information, such as a memory, latch or register. The unintended change in the stored information will result in an output that could disrupt the proper operation of a system that includes the circuit.
In circuits that have been SET-hardened (designed to produce fewer, less severe, or no SETs and thus SET-immune), or in circuits that do not need SET hardening (the unhardened circuit is sufficiently hard), but SET is a concern, an SET antenna diode that has equivalent or better SET hardness is needed. Otherwise, the addition of the antenna diode can compromise the SET hardening designed into the circuit or in the case of an unhardened circuit can adversely increase the probability of an SET occurring. In most energetic particle environments, such as space, there is a distribution of particle LETs, where the higher the LET, the fewer the particles with that LET. The number of these particles with a particular LET can be statistically averaged in terms of the number of particles impinging a surface in a given time. Many circuits will only produce an SET with LETs greater than a certain limit. Thus, a circuit that is not SET-immune could still have a high enough LET tolerance such that the number of SETs within a given time is small enough to allow acceptable circuit operation.
The MOSFET's drain to body p-n junction will produce a transient current pulse from an energetic particle passing through it. A MOSFET output driver may be able to compensate the transient current pulse and maintain the desired voltage on the signal node for a high enough particle LET that the SET probability of occurrence is acceptable. In this case placing an SET-producing antenna diode near the MOSFET output driver is not likely to significantly increase the SET probability because it will take the same particle LET passing through the antenna diode to generate an SET. However, MOSFET output drivers can drive large capacitance loads which frequently have long metal lines from the driver to the gates and thus significant metal resistance. If an SET-producing antenna diode is placed near the gate, the metal resistance back to the output driver may compromise the ability of the output driver to compensate for the charge collected from a particle LET in the antenna diode. As a result, an SET that disturbs circuit operation may be produced at a much lower LET than if the particle had passed through the output driver or an antenna diode placed near the output driver resulting in an increase in SET probability that may be unacceptable. Hence, an antenna diode with sufficient SET hardness is needed.